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发表于 2013-8-21 22:21 · 香港
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本帖最后由 killbills 于 2013-8-21 22:22 编辑
簡單翻譯.
即使CPU和GPU整合在一起, 執行GPGPU仍是比較雞肋. 因為CPU及GPU各有其內存, 即使它們在物理上共用同一內存
在軟件角度看其實仍是分開的. (因為CPU及GPU不能同時訪問內存中一個元位, 數據不能同時被CPU及GPU讀寫) 當一個CPU程序想交GPU去運算, 要把CPU的內存數據中複寫到GPU中, 當GPU運算完了, 再將數據複寫回CPU中. 這會浪費時間, 亦讓GPU和CPU運行的程式代碼難以配對. 而且CPU和GPU數據結構不同, CPU和GPU間數據不能單純複寫, 不然數據位置會全錯. hUMA便是AMD針對此問題的方案. 有了hUMA, GPU能直接訪問CPU的內存, 實現了GPU和CPU同時讀寫同一數據. hUMA是一個快取同調系統, 令GPU和CPU對內存中數據有一個持續統一的瞰察. 任一處理器對內存數據作出了更改, 另一處理器亦會知道有關更改, 即使已快取了舊有數據
Even with the integration of GPUs and CPUs into the same chip, GPGPU is quite awkward for software developers. The CPU and GPU have their own pools of memory. Physically, these might use the same chips on the motherboard (as most integrated GPUs carve off a portion of system memory for their own purposes). From a software perspective, however, these are completely separate.
This means that whenever a CPU program wants to do some computation on the GPU, it has to copy all the data from the CPU's memory into the GPU's memory. When the GPU computation is finished, all the data has to be copied back. This need to copy back and forth wastes time and makes it diffi*** to mix and match code that runs on the CPU and code that runs on the GPU.
The need to copy data also means that the GPU can't use the same data structures that the CPU is using. While the exact terminology varies from programming language to programming language, CPU data structures make extensive use of pointers: essentially, memory addresses that refer (or, indeed, point) to other pieces of data. These structures can't simply be copied into GPU memory, because CPU pointers refer to locations in CPU memory. Since GPU memory is separate, these locations would be all wrong when copied.
hUMA is the way AMD proposes to solve this problem. With hUMA, the CPU and GPU share a single memory space. The GPU can directly access CPU memory addresses, allowing it to both read and write data that the CPU is also reading and writing.
hUMA is a cache coherent system, meaning that the CPU and GPU will always see a consistent view of data in memory. If one processor makes a change then the other processor will see that changed data, even if the old value was being cached.
http://arstechnica.com/informati ... his-year-in-kaveri/ |
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